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BRM1553PCI Block Diagram
BRM1553PCI Block Diagram

Part# BRM1553PCI-RND

(PCI IP Core)

MIL-STD-1553 BC/RT/MT with PCI Interface, Intellectual Property Core for FPGA


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MIL-STD-1553B Notice 2 Bus Controller, Remote Terminal, Bus monitor with PCI interface IP Core for FPGA and ASIC Devices, Development License, Including 10 Prototype Units

Allows you to easily incorporate robust MIL-STD-1553 functionality into an FPGA or ASIC and connect to your host CPU via a standard PCI bus interface. The BRM1553PCI IP core is suitable for any MIL-STD-1553 implementation. The core incorporates a back end logic that arranges the messages in a predefined memory structure, which simplifies the interface between the MIL-STD-1553 bus and the local CPU. The BRM1553PCI core can act as a full replacement (2nd source) for DDC® Micro-ACE® devices as the data is arranged in the same way and the back-end interface is compatible to PCI.

Back End Interface
Includes DDC® Micro-ACE® interface over PCI, compatible with existing drivers and applications.
• No need to rewrite drivers' code
• Eliminates replacement risk

PCI
The IP core includes a full PCI target interface.
• PCI specification 2.3 compliant
• 33MHz performance (66MHz optional)
• 32 bit data path
• Zero wait states burst mode
• Full target functionality

Gate Count
A small gate count is required from an FPGA device even for complex applications, minimizing cost and the space required on the target board.

Manchester Decoder
The unique Manchester decoder can work with any even clock frequency from 12Mhz and up to reduce clock sources and clock domains onboard (reduces EMI/RFI). Advanced algorithms for filtering out noise and disturbances enable the core to operate in harsh environments.

Transceivers
The BRM1553PCI IP core connects to any standard transceiver-transformer pair. The core was fully validated with a 3rd party dual transceiver.

* DDC®, Mini-ACE®and Micro-ACE® are registered trademarks of Data Device Corporation, Bohemia, NY, USA. There is no affiliation between Data Device Corporation and Sital Technology, Ltd or Sealevel Systems Inc. Sealevel is the licensed partner of Sital Technologies, Kfar-Saba, Israel, for distribution in the United States of Sital MIL-STD-1553 products and IP core products.
Compatibility MIL-STD-1553B
Feature Summary:
  • • MIL-STD-1553 Intellectual Property for FPGAs and ASIC
  • • Suitable for any MIL-STD-1553 BC, RT, MT implementation
  • • Compatible to Enhanced DDC® Mini-Ace® interface and functionality, works with existing software drivers
  • • 33/66MHz PCI back-end interface
  • • Supports PCI Burst mode
  • • Small FPGA area utilization
  • • Up to 4 x MIL-STD-1553 cores with a single PCI interface
  • • Modular architecture allowing flexible implementations
  • • Provided with full verification environment
  • • Passed full RT validation testing by 3rd party
  • • Based on vendor and technology independent VHDL code
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